Huawei is packing memory chips differently to reach 122 terabytes
Huawei’s approach builds capacity through denser NAND die packaging.📷 AI-generated image / TECH&SPACE
- ★Huawei developed die-on-board packaging that places NAND dies directly on the SSD PCB.
- ★The goal is to reach 122TB capacity without depending on sanctioned advanced 3D NAND chips.
- ★The story shows that chip competition is moving from lithography alone into packaging and system integration.
Huawei’s 122TB SSD is not just a capacity story. According to Tom’s Hardware, the key is a new die-on-board packaging method that mounts NAND dies directly onto the SSD printed circuit board instead of relying on more conventional chip packaging. It is not as clean as simply buying the densest, latest 3D NAND, but it is a very direct response to supply-chain pressure.
The constraint Huawei is trying to route around sits at the intersection of technology and politics. U.S. export controls and tools such as the official BIS Entity List have limited access to parts of the advanced semiconductor stack that depend on American technology, equipment or supply chains. If the most advanced high-layer-count 3D NAND is not freely available, the practical engineering question changes: can less dense NAND be arranged more tightly and more directly?
Huawei’s answer is packaging. A die-on-board approach removes some of the intermediate structure between the memory dies and the SSD board itself. Instead of raising capacity only because each NAND package contains denser silicon, the drive gains capacity by fitting more NAND dies into the available physical footprint. In that model, the SSD’s construction becomes nearly as important as the memory generation inside it.
A new die-on-board design mounts NAND dies directly onto the SSD PCB, working around constraints created by U.S. export controls on advanced 3D NAND technology.
Die-on-board layout shifts the focus from the chip package to the SSD board.📷 AI-generated image / TECH&SPACE
This is not a magic escape hatch from sanctions. Less dense NAND combined with more aggressive packaging can create hard questions around yield, serviceability, heat, reliability and manufacturing complexity. The available article context does not provide performance figures, power data, endurance ratings, controller details or the exact target market for the 122TB drive. So the right reading is not that Huawei has erased the NAND technology gap. The sharper reading is that the company is looking for alternative engineering paths where the standard procurement route is blocked.
That is the broader signal for the storage industry. Flash memory is often discussed through the number of layers in 3D NAND or through the raw capacity printed on a drive, but the competition is increasingly shifting into packaging, board integration and system design. If advanced chips cannot be sourced, value moves toward the ability to stack, connect and cool the chips that are actually available.
For infrastructure buyers, the unresolved question is whether this kind of SSD can deliver steady performance and reliability, not just an impressive capacity number. For chip geopolitics, the signal is already clearer. Export controls can restrict access to premium components, but they do not always stop engineering workarounds. Sometimes the contest is not about who has the most advanced NAND. It is about who can extract the most useful capacity from the NAND they can still reach.

